1. Field of the Invention
The present invention generally relates to a method for fabricating a semiconductor device, and more specifically, to a method for fabricating a semiconductor device wherein a predetermined region of a semiconductor substrate is etched prior to formation of a device isolation film defining an active region to form a gate having a stepped gate channel, so as to decrease a leakage current of a storage node junction region, thereby improving a refresh characteristic of the semiconductor device.
2. Description of the Related Art
FIGS. 1a through 1f are cross-sectional views illustrating a conventional method for fabricating a semiconductor device.
Referring to FIG. 1a, a pad oxide film 12 and a pad nitride film are formed on a semiconductor substrate 11.
Referring to FIG. 1b, the pad oxide film 12, the pad nitride film 13 and a predetermined thickness of the semiconductor substrate to form a trench 14 defining an active region.
Referring to FIG. 1c, a sidewall oxide film (not shown) is formed on a surface of the trench 14. A liner nitride film (not shown) is then deposited on the entire surface including the surface of the trench 14. Thereafter, a HDP high density plasma oxide film (not shown) filling up the trench 14 is formed.
Next, the HDP oxide film (not shown) is subjected to a CMP process to expose the pad nitride film 13. The pad nitride film 13 is then removed to form a device isolation film 15.
Referring to FIG. 1d, a photoresist film (not shown) is deposited on the semiconductor substrate 11. Thereafter, the photoresist film is exposed and developed to form a photoresist film pattern (not shown) exposing a predetermined region. The exposed predetermined region includes a storage node contact region and a portion of a gate region adjacent thereto.
Thereafter, the exposed semiconductor substrate 11 is etched using the photoresist film pattern as an etching mask. The photoresist film pattern is then removed.
Referring to FIG. 1e, the pad oxide film 12 is removed. A buffer oxide film (not shown) is then formed. Thereafter, the active region of the semiconductor substrate 11 is subjected to an ion-implant process to form a well region. The buffer oxide film (not shown) is then removed.
Next, a stacked structure of a gate oxide film 16, a gate polysilicon layer 17, a gate silicide layer 18 and a hard mask nitride film 19 is sequentially deposited and then patterned to form a gate.
The active region of the semiconductor device manufactured in accordance with the above-described conventional method has a silicon horn at the top edge thereof under the gate as shown in FIG. 1f, which, in turn, degrades the characteristics of the semiconductor device.
Accordingly, drawbacks such as the gate oxide integrity problem and a cell turn-on characteristic degradation occur.